1. Field of the Invention
The present invention generally relates to apparatuses for evaluating recording and reproducing characteristics of an information recording medium and more particularly, to a bit error measuring apparatus for measuring bit errors of a rewritable information recording medium after rewriting on the medium has been repeatedly performed.
2. Description of the Prior Art
FIG. 1 shows a known bit error measuring apparatus. The known bit error measuring apparatus includes an information recording medium 1 for recording and reproducing data, a drive unit 2 for recording signals on the information recording medium 1, a controller 20 for controlling the drive unit 2 during the recording and reproducing of the data and a host computer 40. The host computer 40 transmits commands and data to the controller 20 so as to record or reproduce the data on the information recording medium 1 through the drive unit 2. The controller 20 includes a control CPU 21 for controlling operation of the controller 20, a data memory 6 for temporarily storing recording data or reproduced data, an error controller 7 for adding error correction codes to the data of the data memory 6, a data modulator/demodulator 8 for modulating the data of the data memory 6 or, on the contrary, demodulating reproduction signals delivered from the drive unit 2 so as to store the demodulated reproduced signals in the data memory 6 and an interface 9 for connecting the controller 20 to the host computer 40.
The host computer 40 includes a random number generator 11 for generating random number data, a comparative data generator 12 for generating comparative data by adding the error correction codes to the random number data, a main memory 10 for storing the random number data, the comparative data and the reproduced data delivered from the controller 20 and a comparator 13 for detecting bit errors by comparing the reproduced data and the comparative data.
Hereinbelow, a bit error measuring method employed in the known bit error measuring apparatus referred to above is described with reference to a flowchart of FIG. 2. In this example, rewriting is performed 1 million times in an area of 32,000 bytes and bit errors are measured at an interval of 100,000 times of rewriting. At step S1, random number data of 32,000 bytes corresponding to a recording area for measuring bit errors are generated by the random number generator 11 of the host computer 40 and are stored as recording data in the main memory 10 from address "30000h". It is to be noted that character h in the above address "30000h" represents a hexadecimal number. Then, at step S2, the host computer 40 delivers a WRITE command and the recording data of 32,000 bytes to the controller 20 via the interface 9. The control CPU 21 stores the recording data in the data memory 6, while the error controller 7 encodes the recording data and adds error correction codes to the recording data so as to generate encoded data. The encoded data are modulated by the data modulator/demodulator 8 so as to be recorded in a predetermined area of the information recording medium 1 by the drive unit 2, which area is allotted for measuring bit errors.
Subsequently, at step S3, a determination is made as to whether or not the number of times of recording is a multiple of 100,000 times which is an interval of the number of times of rewriting for measuring bit errors. In the case of "NO" at step S3, the program returns to step S1. On the other hand, in the case of "YES" at step S3, the host computer 40 delivers a READ command to the controller 20 at step S4. In response to a demand from the controller 20, the drive unit 2 reproduces the signals recorded in the predetermined area of the information recording medium 1 and the reproduced signals are demodulated by the data modulator/demodulator 8 so as to be stored in the data memory 6. The data stored in the data memory 6 are directly transferred to the host computer 40 by the control CPU 21 without passing through the error controller 7. Namely, without performing error correction, the control CPU 21 directly transfers the data together with the error correction codes, as reproduced data, from the data memory 6 to the host computer 40. The host computer 40 stores the reproduced data in the main memory 10 from address "50000h".
Thereafter, at step S5, the comparative data generator 12 fetches the recording data of 32,000 bytes stored in the main memory 10 from address "30000h" and adds the error correction codes thereto so as to store the recording data as comparative data in the main memory 10 from address "40000h". Then, at step S6, the comparator 13 of the host computer 40 compares the reproduced data stored in the main memory 10 from address "50000h", with the comparative data of step S5 stored in the main memory 10 from address "40000h" so as to detect bit errors. Finally, at step S7, a decision is made as to whether or not the number of times of recording has reached 1,000,000 times which is the preset maximum of times of rewriting. In the case of "NO" at step S7, the program returns to step S1.
In the above mentioned known bit error measuring apparatus, since different random number data are recorded each time for the purpose of evaluating, substantially in a state where users record various data, deterioration of the information recording medium due to repeated recording, the random number data are calculated by the host computer each time the random number data are recorded, so that a long time is required for performing processing. Furthermore, since measurements of bit errors at an interval of 100,000 times of rewriting are performed based on different recording data each time, such a problem arises that it is impossible to measure bit errors under an identical processing condition.